16nm SHA256 Mining & Computing Chip

fully customized 16nm SHA256 Mining & Computing chipC6 is a high-performance low-power computing chip. The chip is produced using TSMC’s advanced 16nm FinFet process technology. Through efficient chip architecture design and ultra-high performance ultra-low power self-customized Standard Cell Library, the chip achieves industry-leading computing power and energy consumption ratio in the field of SHA256 algorithm calculation chip. With 200 logic computing cores, each chip can reach 130GH/s hashing power and 39W/TH energy consumption ratio.

Specification

P/n: C6

Algorithm: SHA256

Cores: 200

Core Voltage: <0.36V

Die Size: 17.27 mm²

Clock Speed: 666MHz

Performance: 130GH/s

Energy Consumption: 39W/TH

Technology Node: TSMC 16nm FinFet

Features

In the ultra-low-voltage working mode, it supports minimum voltage of 0.30V and the power consumption can achieve 39W/TH;

The ultra-wide working voltage range in low-voltage working mode is 0.30V - 0.44V. It supports low-power mode, standard mode, large computing power mode and other operating modes. Users can configure different requirements of energy consumption ratio and computing power;

The working frequency can be continuously configured, up to 1GHz. The single-chip computing power can be dynamically adjusted from76GH/s to 200GH/s according to the application requirements;

It supports UART communication interface for command and data transmission, and the baud rate can be up to 12Mbps;

UART command supports CRC5 check protection, UART data supports CRC16 check protection;

It supports cascade of chips, and single link supports serial link of 255 chips.

Proprietary Microarchitecture for Performance

Bitcoin ASIC is a completely different design of microarchitecture. We implement a tightly coupled hyper pipeline and increase clock speed with non-blocking. Optimized hashing algorithm for Bitcoin mining will also be capable of reducing its cycles.

About 30% more performance/clock can be gained by our proprietary microarchitecture implementation.

Backend and Physical Design for Power Consumption

About 50% reduction in power/performance can be realized by using customized standard cells. Fast and accurate performance of customized one bit and multiple bits adders can be used in the design, which would have a higher speed yet lower power consumption compared with the usual design. Besides, characterized standard cells, I/O and complex cells would enable our Bitcoin Mining ASICs to work at ultra-low voltages.

Design of the merged dynamic logic leads to a better performance, lower power consumption and a smaller size.

The efficiency of ASIC would be maximized by the almost fully manual placement in layout and creative timing signoff methods.

System and Software for Cost and Reliability

The system design uses customized PLL and proprietary software algorithms for Bitcoin mining machine, with continuous dynamically variable clock frequency and core voltage, which enable the performance to be increased by 20%, and product’s longer working life can be ensured by making use of the technology of high-temperature thermal management.

Our design for power supply can reduce IR drop, thereby improving the stability and balancing efficiency and performance of mining machines.